Recently, I am studying the Superscalar architecture for one of my course, Advance Computer Architecture. This architecture employs instruction level parallelism (ILP) which is implemented in a single processor. This architecture is widely used in current processor, for instance 64-bit itanium processor, Core i7 (using Nehalem Architecture), AMD 64-bit cores, etc. The first impression when I studied this architecture is that this processor is really complex, more than I expected. My studies about pipeline architecture and DSP processor is definitely only small piece of all topics related to computer architecture, which make me more challenged to learn it.
Instruction-level-parallelism is a method to execute multiple instruction simultaneously in a parallel scheme. To implement this into processor, parallel multiple executable unit (ALU, multiplier, etc) should be added. This addition definitely would bring a lot of hazard in the processor, for instance data hazard and control hazard. This is happens since there are dependences between instruction and between register in parallel architecture.
To solve the hazard, a lot of schemes are developed. These are scheduling, speculation, and branch/jump prediction. Scheduling is used to manipulate the flow of the instruction and do the renaming register so executable unit is efficiently used and the data dependence is solved. Speculation is used to fight the control hazard caused by branch/jump. Branch/jump prediction is used to reduce the penalty cost caused by branch instruction.
All of the schemes are not simple. A lot of research are done to produce the robust algorithm and architecture to solve these problems. It impress me since the methodology used in this architecture could bring outstanding performance in the processor which I never imagine before. From this course, my interest in processor grows. I could learn advance implementation of processor and enhance my knowledge in this area. In the next course, I will study the Itanium processor, which is an architecture for 64-bits Intel processor, and will work on the parallel processor using system C. I am looking forward to work on it. Wish all the best.
